Learning Outcomes:

After completing this course, you will be able to:

• • Design digital circuits using the Datapath and Controller paradigm.
  • Describe digital circuits and create their test benches using System Verilog.
  • Develop a RISC-V processor.
  • Verify and perform compliance testing on the designed processor.

Course Outline

Introduction to Digital Systems Design and Verification

• • • Overview of verification, its job market, and essential software tools.
  • Combinational Circuits
    • Mux, Decoders, Encoders, Latch Circuits.
    • RTL (Register-Transfer Level) and simulation.
  • Sequential Circuits
    • Flip flops, Counters, Shift Registers, Memory.
    • Single Cycle Processor Design.

How to Apply

Registration Deadline: 16th July 2023 Start Date: 17th July 2023 Fee: Rs. 8,500 for Non-UET Students / Rs. 5,000 for UET Students Class Days: Monday, Wednesday, Friday Class Timings: 9 AM – 1 PM Who Should Join This Course: This course is tailored for:

• EE/Mechatronics/CS/SE/CE/IT Students & Graduates

Course Features:

• Certified & Experienced Instructors
• Real-Time Hands-on Practice
• Build Your Own RISC-V Processor
• Student Interviews with Potential Employers

Freelancing Opportunities:

Leverage freelancing platforms like Upwork and Fiverr to tap into freelance opportunities in this domain. Full-time freelancers can potentially earn a minimum of approximately two hundred thousand PKR monthly, working on projects for companies and educational assignments.

Contact Us 

Location: G.T Road, Staff Houses Engineering University Lahore, Lahore, Punjab 39161 Contact Person: Qazi M. Qandeer Phone: +923364065600 Office Hours: 9 AM – 5 PM (Mon – Fri)